Prospective authors are invited to submit full-length, four-page manuscript, including figures, tables and references, to the official A-SSCC2017 website. Authors submitting papers to Special Session - Industry Program allow either two-page or four-page format. All papers will be handled and reviewed electronically. Papers are solicited in the following categories.
|Paper submission||June 5, 2017, 20:00 (GMT)|
|Acceptance notification||August 4, 2017|
|Final paper submission||September 8, 2017|
1. Analog Circuits & Systems: Amplifiers, comparators, switch capacitor circuits, continuous-time & discrete-time filters, voltage/current references; DC-DC converters, power-control circuits; IF/baseband analog circuits, AGC/VGA; non-linear analog circuits.
2. Data Converters: Nyquist-rate and oversampling A/D, D/A converters, time-to-digital converters, and capacitance-to-digital converters; sub-circuits for data converters including sample-and-hold circuits, calibration circuits, etc.
3. Digital Circuits & Systems: Design, fabrication, and test of digital VLSI systems; high-speed low-power digital circuits, power-reduction and management methods for digital VLSI, ultra-low-voltage and sub-threshold logic design; leakage reduction techniques; clock distribution, I/O circuits, reconfigurable logic-array circuits; supply/substrate noise measurement and cancellation for digital VLSI, variation and fault-tolerant circuits.
4. SoC & Signal Processing Systems: System-on-chip(including 3D integration), microprocessors, network processors, baseband communication processing system & architectures, energy efficient signal-processing systems; multimedia and recognition processing systems; cryptographic and security-processing circuits and systems; bio-medical/neural signal processors and sensor network systems.
5. RF: Receivers/transmitters/transceivers for wireless systems; narrowband RF, ultra-wideband and millimeter-wave circuits; circuits and building-blocks including RF front-end, LNA, mixer, power amplifiers, VCOs, frequency synthesizers, RF filters, RF switches, power detectors, active antennas.
6. Wireline: Receivers/transmitters/transceivers for wireline systems; optical/electrical data links and backplane transceivers; power-line communication; clock generation circuits, PLL, DLL, spread-spectrum clock generation; building blocks for high-speed wireline communication; analog-digital mixed-mode circuits.
7. Emerging Technologies and Applications: Advanced system designs and circuit solutions for technologies and applications including state-of-the-art devices and packaging technologies; flexible and printable electronics; smart sensors and transducers; MEMS for analog, RF, and sensor applications; image sensors and displays; energy harvesting systems; transceiver systems; medical/bio-electronics/bio-inspired chip design and silicon systems.
8. Memory: Volatile and Non-volatile memory; new memory designs for 3D/2D architectures, emerging devices such as resistive-/phase change-/magnetic-/ferro-electric- memory devices; data storage and multi-bit-cell memory design; cache-memory system, multi-port memory, and CAM design; yield-enhancing and ECC techniques; memory testing and built-in self-test.
1. Industry Program : This special category accepts only papers based on state-of-the-art industrial products. Strong emphasis on systems realized by silicon chips is encouraged. The papers should cover architecture, circuits, process technology, packaging and testing, including characterization results, die and system photos, as well as product demos. Authors submitting papers to Indusrty Program allow either two-page or four-page format.
2. Student Design Contest : A student design contest is held among the accepted papers with system prototypes or measurement results of which operations can be demonstrated on-site. Refer to the web for further information.
|Steering Committee||Chair||Tadahiro Kuroda, Keio Univ., Japan|
|Conference||Chair||Young June Park, Seoul National Univ., Korea|
|Organizing Committee Chair||Suhwan Kim, Seoul National Univ., Korea|
|Technical Program Committee||Chair||Tsung-Hsien Lin, National Taiwan Univ., Taiwan|
|Co-Chair||Hong June Park, POSTECH, Korea|
|Vice-Chair||Chia-Hsiang Yang, National Taiwan Univ., Taiwan|
|Vice-co-Chair||Jae-Yoon Sim, POSTECH, Korea|